The present disclosure relates to analog-to-digital conversion and, more particularly, to analog-to-digital conversion (ADC) methods and systems that are well suited for use in an image sensor, such as a CMOS image sensor.
ADC conversion typically requires the input signal to settle to a certain percentage of its final value before it can start the conversion cycle. This settling percentage is usually about one-half (½) of the final ADC bit resolution.
As image sensor size grows larger, the amount of time it takes for the pixel to drive its output load is increasing. This settling time is therefore limiting the speed of the overall image sensor frame rate.